{"id":19293,"date":"2015-05-22T14:59:42","date_gmt":"2015-05-22T07:59:42","guid":{"rendered":"https:\/\/banbientan.com\/?p=19293"},"modified":"2015-05-22T14:59:42","modified_gmt":"2015-05-22T07:59:42","slug":"cau-hinh-phan-cung-plc","status":"publish","type":"post","link":"https:\/\/hunglong.banbientan.com\/?p=19293","title":{"rendered":"C\u1ea5u h\u00ecnh ph\u1ea7n c\u1ee9ng PLC"},"content":{"rendered":"

T\u00ean c\u00e1c b\u1ed9 ph\u1eadn<\/strong><\/span><\/h3>\n

\"ten<\/a><\/p>\n

LED ch\u1ec9 th\u1ecb tr\u1ea1ng th\u00e1i ho\u1ea1t \u0111\u1ed9ng c\u1ee7a CPU.<\/strong><\/h3>\n

\u0110\u00e8n LED hi\u1ec3n th\u1ecb tr\u00ean CPU c\u00f3 th\u1ec3 d\u00f9ng \u0111\u1ec3 x\u00e1c \u0111\u1ecbnh tr\u1ea1ng th\u00e1i ho\u1ea1t \u0111\u1ed9ng c\u1ee7a b\u1ed9 \u0111i\u1ec1u khi\u1ec3n (PLC).
\nPOWER hi\u1ec3n th\u1ecb tr\u1ea1ng th\u00e1i ngu\u1ed3n c\u1ee7a PLC.
\nV\u00ed d\u1ee5, khi pin kh\u00f4ng k\u1ebft n\u1ed1i ho\u1eb7c \u0111i\u1ec7n \u00e1p b\u1ecb th\u1ea5p, ho\u1ea1t \u0111\u1ed9ng c\u1ee7a PLC s\u1ebd li\u00ean t\u1ee5c b\u1ea5t \u1ed5n \u0111\u1ecbnh v\u00e0 \u0111\u00e8n LED ERR\/ ALM s\u1ebd nh\u1ea5p nh\u00e1y.
\n\"led\"nguon<\/a><\/p>\n

Ph\u1ea7n ngu\u1ed3n c\u1ea5p (h\u00ecnh tr\u00ean)<\/strong><\/h3>\n

Ngu\u1ed3n c\u1ea5p c\u1ee7a CP1 c\u00f3 2 lo\u1ea1i: AC100-240V v\u00e0 DC24V.
\nNgu\u1ed3n c\u1ea5p c\u1ee7a CP1 n\u1eb1m \u1edf v\u1ecb tr\u00ed ph\u00eda tr\u00ean c\u00f9ng c\u1ee7a kh\u1ed1i \u0111\u1ea7u v\u00e0o.<\/p>\n

Ph\u1ea7n ng\u00f5 v\u00e0o<\/strong><\/h3>\n

B\u1ed9 ph\u1eadn ng\u00f5 v\u00e0o c\u1ee7a CP1 n\u1eb1m tr\u00ean c\u00f9ng.
\nB\u1ed9 ph\u1eadn \u0111\u1ea7u v\u00e0o bao g\u1ed3m nhi\u1ec1u \u0111\u1ea7u \u0111\u1ea5u d\u00e2y, s\u1eed d\u1ee5ng chung 1 ch\u00e2n COM.
\n\"dau<\/a>
\nB\u00e2y gi\u1edd, h\u00e3y xem m\u1ea1ch \u0111\u1ea5u d\u00e2y \u0111\u1ea7u v\u00e0o.\"input<\/a>
\nHi\u1ec3n th\u1ecb IN th\u1ec3 hi\u1ec7n t\u1eeb 00-11.
\n\u0110\u1ec3 \u0111\u01b0a t\u00edn hi\u1ec7u \u0111\u1ebfn b\u1ed9 \u0111i\u1ec1u khi\u1ec3n l\u1eadp tr\u00ecnh, ph\u1ea3i s\u1eed d\u1ee5ng m\u1ed9t ngu\u1ed3n \u0111i\u1ec7n c\u1ea5p cho m\u1ea1ch photo coupler b\u00ean trong.
\nTrong tr\u01b0\u1eddng h\u1ee3p n\u00e0y n\u00ean d\u00f9ng ngu\u1ed3n ri\u00eang, kh\u00f4ng d\u00f9ng chung ngu\u1ed3n v\u1edbi PLC v\u00ec c\u00f3 th\u1ec3 g\u00e2y ra nhi\u1ec5u l\u00e0m PLC ho\u1ea1t \u0111\u1ed9ng sai.<\/span><\/p>\n

\u0110\u1ea5u d\u00e2y c\u00f4ng t\u1eafc<\/strong><\/h3>\n

Khi \u0111\u1ea5u d\u00e2y v\u1edbi c\u00e1c thi\u1ebft b\u1ecb nh\u01b0 c\u00f4ng t\u1eafc h\u00e0nh tr\u00ecnh, c\u00f4ng t\u1eafc nh\u1ecf hay n\u00fat nh\u1ea5n, kh\u00f4ng c\u1ea7n ph\u1ea3i lo v\u1ec1 chi\u1ec1u c\u1ee7a d\u00f2ng \u0111i\u1ec7n.
\nH\u00e3y c\u00f9ng xem m\u1ea1ch b\u00ean trong c\u1ee7a CP1. Chi\u1ec1u Diode l\u00e0 chi\u1ec1u c\u1ee7a d\u00f2ng \u0111i\u1ec7n, n\u00ean c\u00f3 th\u1ec3 th\u1ea5y r\u1eb1ng d\u00f2ng \u0111i\u1ec7n c\u00f3 th\u1ec3 ch\u1ea1y tr\u00ean c\u1ea3 2 chi\u1ec1u.
\n\"dau<\/a>
\nH\u00e3y c\u00f9ng xem c\u00e1ch \u0111\u1ea5u d\u00e2y c\u1ee7a c\u1ea3m bi\u1ebfn <\/a><\/strong>.Trong tr\u01b0\u1eddng h\u1ee3p \u0111\u1ea5u d\u00e2y c\u1ea3m bi\u1ebfn chi\u1ec1u d\u00f2ng \u0111i\u1ec7n thay \u0111\u1ed5i theo ng\u00f5 transistor c\u1ee7a c\u1ea3m bi\u1ebfn. Do \u0111\u00f3 khi \u0111\u1ea5u d\u00e2y c\u1ea3m bi\u1ebfn ph\u1ea3i ch\u00fa \u00fd.<\/p>\n

\u0110\u1ea5u d\u00e2y c\u1ea3m bi\u1ebfn<\/strong><\/h3>\n

Lo\u1ea1i DC 3 d\u00e2y (lo\u1ea1i ng\u00f5 ra PNP Collector h\u1edf)<\/strong>
\nNg\u00f5 ra PNP l\u00e0 lo\u1ea1i ng\u00f5 ra c\u1ea3m bi\u1ebfn \u0111\u01b0\u1ee3c d\u00f9ng ph\u1ed5 bi\u1ebfn \u1edf Ch\u00e2u \u00c2u.
\nH\u00e3y xem s\u01a1 \u0111\u1ed3 m\u1ea1ch c\u1ee7a c\u1ea3m bi\u1ebfn v\u00e0 PLC CP1.
\nT\u1ea3i c\u1ee7a c\u1ea3m bi\u1ebfn l\u00e0 \u0111\u1ea7u v\u00e0o CP1, bi\u1ec3u t\u01b0\u1ee3ng c\u00f4ng t\u1eafc ch\u00ednh l\u00e0 transistor b\u00ean trong c\u1ea3m bi\u1ebfn.
\n<\/span>\"dau<\/a>
\n
\nNh\u01b0 \u0111\u00e3 th\u1ec3 hi\u1ec7n \u1edf trang tr\u01b0\u1edbc, kh\u00f4ng c\u1ea7n quan t\u00e2m \u0111\u1ebfn c\u1ef1c t\u00ednh c\u1ee7a ngu\u1ed3n \u0111i\u1ec7n c\u1ee7a kh\u1ed1i \u0111\u1ea7u v\u00e0o, khi \u0111\u00f3, trong tr\u01b0\u1eddng h\u1ee3p \u0111\u1ea5u d\u00e2y c\u1ea3m bi\u1ebfn, chi\u1ec1u d\u00f2ng \u0111i\u1ec7n \u0111\u01b0\u1ee3c x\u00e1c \u0111\u1ecbnh d\u1ef1a theo transistor b\u00ean trong c\u1ea3m bi\u1ebfn. V\u1edbi c\u1ea3m bi\u1ebfn lo\u1ea1i PNP, th\u1ef1c hi\u1ec7n vi\u1ec7c \u0111\u1ea5u d\u00e2y sao cho d\u00f2ng \u0111i\u1ec7n ch\u1ea1y qua c\u1ea3m bi\u1ebfn \u0111\u1ebfn \u0111\u01b0\u1eddng d\u00e2y t\u00edn hi\u1ec7u (\u0111\u1ea7u v\u00e0o PLC) \u0111\u1ebfn ngu\u1ed3n 0V.
\nDo \u0111\u00f3, ch\u00e2n COM c\u1ee7a \u0111\u1ea7u v\u00e0o PLC CP1 ph\u1ea3i n\u1ed1i \u0111\u1ebfn ngu\u1ed3n 0V. Ph\u01b0\u01a1ng ph\u00e1p n\u1ed1i d\u00e2y n\u00e0y g\u1ecdi l\u00e0 COM – (hay g\u1ecdi l\u00e0 COM \u00e2m)<\/span>
\nLo\u1ea1i DC 3 d\u00e2y (ng\u00f5 ra NPN Collector h\u1edf)<\/strong>
\nNg\u00f5 ra NPN l\u00e0 lo\u1ea1i ng\u00f5 ra c\u1ea3m bi\u1ebfn ph\u1ed5 bi\u1ebfn \u0111\u01b0\u1ee3c d\u00f9ng t\u1ea1i Nh\u1eadt.
\nV\u1edbi c\u1ea3m bi\u1ebfn \u0111\u1ea7u ra lo\u1ea1i NPN, th\u1ef1c hi\u1ec7n vi\u1ec7c \u0111\u1ea5u d\u00e2y sao cho d\u00f2ng \u0111i\u1ec7n ch\u1ea1y t\u1eeb \u0111\u01b0\u1eddng d\u00e2y t\u00edn hi\u1ec7u (\u0111\u1ea7u v\u00e0o PLC) \u0111\u1ebfn c\u1ea3m bi\u1ebfn v\u00e0 v\u1ec1 0V.
\nDo \u0111\u00f3, ch\u00e2n COM c\u1ee7a \u0111\u1ea7u v\u00e0o PLC CP1 ph\u1ea3i n\u1ed1i \u0111\u1ebfn ngu\u1ed3n +24V.<\/span>Ph\u01b0\u01a1ng ph\u00e1p n\u1ed1i d\u00e2y n\u00e0y g\u1ecdi l\u00e0 COM + (hay g\u1ecdi l\u00e0 COM d\u01b0\u01a1ng).<\/span><\/span>
\n\"dau<\/a>
\nS\u1ef1 kh\u00e1c nhau gi\u1eefa PNP v\u00e0 NPN<\/strong><\/span>
\n\u0110\u1ed1i v\u1edbi c\u1ea3m bi\u1ebfn PNP, th\u00ec t\u1ea3i s\u1ebd kh\u00f4ng b\u1eadt ON khi xu\u1ea5t hi\u1ec7n l\u1ed7i ch\u1ea1m \u0111\u1ea5t x\u1ea3y ra \u0111\u1ed1i v\u1edbi \u0111\u1ea7u v\u00e0o PLC CP1.
\nNg\u01b0\u1ee3c l\u1ea1i, v\u1edbi c\u1ea3m bi\u1ebfn NPN, khi l\u1ed7i ch\u1ea1m \u0111\u1ea5t x\u1ea3y ra, th\u00ec \u0111\u1ea7u v\u00e0o PLC CP1 v\u1eabn c\u00f3 th\u1ec3 ON.<\/span>
\nDo \u0111\u00f3 \u0111\u1ec3 \u0111\u1ea3m b\u1ea3o an to\u00e0n, \u1edf Ch\u00e2u \u00c2u, c\u1ea3m bi\u1ebfn PNP \u0111\u01b0\u1ee3c s\u1eed d\u1ee5ng ph\u1ed5 bi\u1ebfn.<\/span>
\n\"npn<\/a>
\nC\u1ea3m bi\u1ebfn ti\u1ec7m c\u1eadn lo\u1ea1i DC 2 d\u00e2y<\/strong>
\nC\u1ea3m bi\u1ebfn ti\u1ec7m c\u1eadn 2 d\u00e2y DC \u0111\u01b0\u1ee3c s\u1eed d\u1ee5ng nhi\u1ec1u do gi\u1ea3m \u0111\u01b0\u1ee3c vi\u1ec7c n\u1ed1i d\u00e2y, th\u1eddi gian, v\u00e0 d\u00f2ng ti\u00eau th\u1ee5 c\u0169ng nh\u1ecf.
\nC\u1ea3m bi\u1ebfn 2 d\u00e2y DC c\u00f3 2 lo\u1ea1i: lo\u1ea1i c\u00f3 c\u1ef1c t\u00ednh v\u00e0 kh\u00f4ng c\u00f3 c\u1ef1c t\u00ednh. V\u1edbi 2 lo\u1ea1i n\u00e0y, t\u1ea3i c\u00f3 th\u1ec3 n\u1ed1i v\u1edbi ngu\u1ed3n + *(d\u01b0\u01a1ng)
\nho\u1eb7c ngu\u1ed3n – (\u00e2m).
\n\"dau<\/a>
\nV\u00ec kh\u1ed1i \u0111\u1ea7u v\u00e0o CP1 ch\u1ec9 s\u1eed d\u1ee5ng chung 1 ch\u00e2n COM, n\u00ean khi s\u1eed d\u1ee5ng c\u00f9ng l\u00fac 2 lo\u1ea1i c\u1ea3m bi\u1ebfn 2 d\u00e2y v\u00e0 3 d\u00e2y th\u00ec y\u00eau c\u1ea7u vi\u1ec7c n\u1ed1i d\u00e2y sao cho h\u01b0\u1edbng c\u1ee7a d\u00f2ng \u0111i\u1ec7n ch\u1ea1y \u0111\u1ebfn ch\u00e2n COM ph\u1ea3i \u0111\u1ed3ng nh\u1ea5t.
\n\u0110\u1ea5u d\u00e2y c\u1ea3m bi\u1ebfn c\u00f3 ng\u00f5 ra Analog<\/strong>
\nCP1E-NA l\u00e0 lo\u1ea1i t\u00edch h\u1ee3p ch\u1ee9c n\u0103ng \u0111\u1ea7u v\u00e0o\/ra analog .
\nV\u1ecb tr\u00ed \u0111\u1ea7u v\u00e0o analog n\u1eb1m \u1edf ph\u00eda tr\u00ean c\u1ee7a kh\u1ed1i \u0111\u1ea5u d\u00e2y trong khi \u0111\u1ea7u ra analog n\u1eb1m \u1edf ph\u00eda d\u01b0\u1edbi c\u1ee7a kh\u1ed1i \u0111\u1ea5u d\u00e2y.
\nDo c\u1ea3m bi\u1ebfn \u0111o kho\u1ea3ng c\u00e1ch c\u00f3 \u0111\u1ea7u ra analog n\u00ean s\u1ebd \u0111\u01b0\u1ee3c n\u1ed1i v\u00e0o 1 \u0111\u1ea7u v\u00e0o analog tr\u00ean PLC CP1E-NA.<\/span>
\n\u0110\u1ea7u v\u00e0o analog cho ph\u00e9p nh\u1eadn t\u00edn hi\u1ec7u l\u00e0 d\u00f2ng \u0111i\u1ec7n ho\u1eb7c \u0111i\u1ec7n \u00e1p t\u00f9y thu\u1ed9c v\u00e0o \u0111\u1ea7u ra c\u1ee7a thi\u1ebft b\u1ecb k\u1ebft n\u1ed1i
\nH\u00e3y c\u00f9ng xem tr\u01b0\u1eddng h\u1ee3p c\u1ee7a \u0111\u1ea7u ra d\u00f2ng \u0111i\u1ec7n.<\/span>
\n\"analog<\/a><\/p>\n

Kh\u1ed1i \u0111\u1ea7u ra<\/strong><\/h3>\n

Kh\u1ed1i \u0111\u1ea7u ra c\u1ee7a CP1 n\u1eb1m \u1edf kh\u1ed1i \u0111\u1ea5u d\u00e2y b\u00ean d\u01b0\u1edbi c\u1ee7a PLC. C\u00e1c ch\u00e2n COM \u0111\u01b0\u1ee3c \u0111\u1ea5u theo t\u1eebng nh\u00f3m v\u00e0 t\u00e1ch r\u1eddi nhau b\u1edfi v\u1ea1ch in \u0111\u1eadm.
\nDo \u0111\u00f3, c\u00f3 th\u1ec3 cho ph\u00e9p s\u1eed d\u1ee5ng nhi\u1ec1u lo\u1ea1i ngu\u1ed3n cho c\u00e1c t\u1ea3i kh\u00e1c nhau.
\n\"output<\/a><\/span>
\n\u0110\u1ea7u ra c\u1ee7a PLC CP1 \u0111\u01b0\u1ee3c chia l\u00e0m 2 lo\u1ea1i: \u0111\u1ea7u ra r\u01a1 le v\u00e0 \u0111\u1ea7u ra transistor
\n\u0110\u1ea7u ra r\u01a1 le v\u00e0 \u0111\u1ea7u ra transistor c\u00f3 nh\u1eefng \u0111\u1eb7c t\u00ednh sau:<\/p>\n\n\n\n\n\n
<\/td>\nLo\u1ea1i ngu\u1ed3n c\u1ea5p<\/strong><\/td>\n\u0110\u1ed9 b\u1ec1n<\/strong><\/td>\nT\u1ed1c \u0111\u1ed9 \u0111\u00e1p \u1ee9ng<\/strong><\/td>\nKh\u1ea3 n\u0103ng \u0111\u00f3ng t\u1ea3i<\/strong><\/td>\n<\/tr>\n
Lo\u1ea1i ng\u00f5 ra Relay<\/td>\nAC\/DC<\/td>\nLo\u1ea1i ti\u1ebfp \u0111i\u1ec3m c\u01a1 kh\u00ed, do \u0111\u00f3 c\u00f3 \u0111\u1ed9 b\u1ec1n gi\u1edbi h\u1ea1n<\/td>\nC\u00f3 gi\u1edbi h\u1ea1n<\/td>\nT\u01b0\u01a1ng \u0111\u1ed1i cao<\/td>\n<\/tr>\n
Lo\u1ea1i ng\u00f5 ra Transitor<\/td>\nDC<\/td>\nTu\u1ed5i th\u1ecd r\u1ea5t cao v\u00ec kh\u00f4ng c\u00f3 ti\u1ebfp \u0111i\u1ec3m c\u01a1 kh\u00ed<\/td>\nC\u00f3 th\u1ec3 \u0111\u00f3ng\/ ng\u1eaft v\u1edbi t\u1ed1c \u0111\u1ed9 cao<\/td>\nTh\u1ea5p<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n

Ng\u00f5 ra Transitor g\u1ed3m c\u00f3 th\u1ec3 l\u00e0 lo\u1ea1i\u00a0PNP (Source type) v\u00e0 NPN (Sink type)<\/u><\/span>\u00a0t\u00f9y theo h\u01b0\u1edbng c\u1ee7a Transitor \u1edf kh\u1ed1i ng\u00f5 ra.
\nT\u00f9y theo lo\u1ea1i thi\u1ebft b\u1ecb \u0111\u1ea5u d\u00e2y \u0111\u1ea7u ra c\u1ee7a PLC m\u00e0 ta l\u1ef1a ch\u1ecdn lo\u1ea1i \u0111\u1ea7u ra cho ph\u00f9 h\u1ee3p.
\nLo\u1ea1i PNP s\u1eed d\u1ee5ng nhi\u1ec1u \u1edf Ch\u00e2u \u00c2u (v\u00ec l\u00fd do an to\u00e0n khi ch\u1ea1m \u0111\u1ea5t), trong khi lo\u1ea1i NPN s\u1eed d\u1ee5ng ph\u1ed5 bi\u1ebfn \u1edf Nh\u1eadt.
\n\"out<\/a>
\nC\u00e1ch \u0111\u1ea5u d\u00e2y t\u1ea3i AC<\/strong>
\nLo\u1ea1i \u0111\u1ea7u ra transistor ch\u1ec9 s\u1eed d\u1ee5ng cho t\u1ea3i DC.
\nDo \u0111\u00f3, khi s\u1eed d\u1ee5ng t\u1ea3i l\u00e0 m\u00f4 t\u01a1 AC, solenoids AC ho\u1eb7c thi\u1ebft b\u1ecb kh\u00e1c s\u1eed d\u1ee5ng ngu\u1ed3n AC th\u00ec ph\u1ea3i d\u00f9ng ng\u00f5 ra r\u01a1 le. Khi r\u01a1 le thay \u0111\u1ed5i t\u1eeb ON sang OFF th\u00ec xung \u0111i\u1ec7n \u00e1p xu\u1ea5t hi\u1ec7n trong cu\u1ed9n d\u00e2y r\u01a1le c\u00f3 th\u1ec3 l\u00e0m h\u01b0 m\u1ea1ch \u0111i\u1ec7n \u0111\u1ea7u ra c\u1ee7a PLC.
\nV\u00ec th\u1ebf, bi\u1ec7n ph\u00e1p kh\u1eafc ph\u1ee5c l\u00e0 ph\u1ea3i d\u00f9ng r\u01a1 le c\u00f3 t\u00edch h\u1ee3p diode \u0111\u1ec3 tri\u1ec7t ti\u00eau xung \u0111i\u1ec7n \u00e1p n\u00e0y.
\n\"dau<\/a>
\nV\u00f9ng nh\u1edb<\/strong>
\nS\u01a1 \u0111\u1ed3 b\u00ean ph\u1ea3i th\u1ec3 hi\u1ec7n v\u00f9ng nh\u1edb trong c\u1ee7a CP1E.<\/span> C\u00f3 nhi\u1ec1u v\u00f9ng nh\u1edb \u0111\u01b0\u1ee3c t\u00edch h\u1ee3p s\u1eb5n b\u00ean trong b\u1ed9 \u0111i\u1ec1u khi\u1ec3n l\u1eadp tr\u00ecnh.<\/span><\/span>
\n\"vung<\/a>
\nTr\u1ea1ng th\u00e1i ON\/OFF c\u1ee7a c\u00e1c \u0111\u1ea7u v\u00e0o\/ra t\u1eeb c\u00e1c thi\u1ebft b\u1ecb n\u1ed1i \u0111\u1ebfn CP1E \u0111\u01b0\u1ee3c l\u01b0u tr\u1eef v\u00e0 hi\u1ec3n th\u1ecb trong v\u00f9ng nh\u1edb I\/O.
\nV\u00f9ng nh\u1edb I\/O \u0111\u01b0\u1ee3c chia theo t\u1eebng khu v\u1ef1c t\u00f9y theo ch\u1ee9c n\u0103ng t\u01b0\u01a1ng \u1ee9ng. N\u01a1i l\u01b0u tr\u1eef v\u00e0 hi\u1ec3n th\u1ecb tr\u1ea1ng th\u00e1i ON\/OFF c\u1ee7a thi\u1ebft b\u1ecb n\u1ed1i v\u1edbi \u0111\u1ea7u v\u00e0o\/ra \u0111\u01b0\u1ee3c g\u1ecdi l\u00e0 v\u00f9ng nh\u1edb CIO (channel IO).
\n<\/span><\/span>
\nUser Program Area<\/strong> : Ch\u1ee9a ch\u01b0\u01a1ng tr\u00ecnh
\nPLC System Configuration<\/strong> : L\u01b0u tr\u1eef c\u00e1c c\u1ea5u h\u00ecnh cho kh\u1ed1i CPU.
\nData Memory Area<\/strong> : V\u00f9ng nh\u1edb cho ph\u00e9p \u0111\u1ecdc\/ghi d\u1eef li\u1ec7u d\u1ea1ng 16bit ch\u1eb3ng h\u1ea1n nh\u01b0 d\u1eef li\u1ec7u v\u1ec1 s\u1ea3n l\u01b0\u1ee3ng.<\/span><\/span><\/p>\n

\u0110\u1ecba ch\u1ec9<\/strong><\/h3>\n

Tr\u1ea1ng th\u00e1i ON\/OFF c\u1ee7a c\u00e1c \u0111\u1ea7u v\u00e0o\/ra n\u1ed1i \u0111\u1ebfn PLC \u0111\u01b0\u1ee3c l\u01b0u tr\u1eef trong v\u00f9ng nh\u1edb I\/O c\u1ee7a PLC. 1 s\u1ed1 \u0111\u01b0\u1ee3c g\u1ecdi l\u00e0 1 \u0111\u1ecba ch\u1ec9 v\u00e0 l\u01b0u trong v\u00f9ng nh\u1edb d\u1eef li\u1ec7u.
\n\u0110\u1ecba ch\u1ec9 \u0111\u01b0\u1ee3c ch\u1ec9 \u0111\u1ecbnh t\u00f9y theo lo\u1ea1i PLC. \u1ede \u0111\u00e2y, h\u00e3y xem \u0111\u1ecba ch\u1ec9 ch\u1ec9 \u0111\u1ecbnh cho CP1.<\/span>
\nC\u1ea5u h\u00ecnh \u0111\u1ecba ch\u1ec9<\/strong>
\n1 \u0111\u1ecba ch\u1ec9 bao g\u1ed3m 1\u0111\u1ecba ch\u1ec9 k\u00eanh 4 s\u1ed1 (digit) v\u00e0 1 \u0111\u1ecba ch\u1ec9 bit 2 s\u1ed1, v\u00e0 hi\u1ec3n th\u1ecb theo \u0111\u1ecbnh d\u1ea1ng s\u1ed1 th\u1eadp ph\u00e2n.
\n<\/span>Ngo\u00e0i ra, 1 k\u00eanh c\u00f3 16 bit. <\/span>
\n\u0110\u1ecba ch\u1ec9 Bit<\/strong>
\n\u0110\u1ecba ch\u1ec9 bit \u0111\u01b0\u1ee3c th\u1ec3 hi\u1ec7n t\u1eeb 00 – 15 v\u00e0 x\u00e1c \u0111\u1ecbnh b\u1eb1ng s\u1ed1 c\u1ee7a d\u00e2y \u0111\u1ea5u v\u1edbi thi\u1ebft b\u1ecb.
\n\u0110\u1ecba ch\u1ec9 k\u00eanh<\/strong>
\n<\/span>\u0110\u1ecba ch\u1ec9 k\u00eanh b\u1eaft \u0111\u1ea7u t\u1eeb 0000. V\u1edbi CP1, \u0111\u1ecba ch\u1ec9 c\u1ee7a c\u00e1c \u0111\u1ea7u v\u00e0o b\u1eaft \u0111\u1ea7u t\u1eeb k\u00eanh 0000 v\u00e0 \u0111\u1ea7u ra b\u1eaft \u0111\u1ea7u t\u1eeb 0100.
\n<\/span>Nh\u01b0 v\u1eady, v\u1edbi CP1, \u0111\u1ecba ch\u1ec9 \u0111\u01b0\u1ee3c g\u00e1n s\u1ebd t\u01b0\u01a1ng \u1ee9ng v\u1edbi v\u1ecb tr\u00ed \u0111\u1ea5u d\u00e2y \u0111\u1ea7u v\u00e0o\/ra.<\/span>
\nV\u00ed d\u1ee5 \u0111\u1ecba ch\u1ec9 c\u1ee7a c\u1ea3m bi\u1ebfn (sensor) \u0111\u1ea5u v\u00e0o ng\u00f5 v\u00e0o 3 c\u1ee7a kh\u1ed1i ng\u00f5 v\u00e0o l\u00e0 0000 03 (K\u00eanh 0000 , bit 3). Ta c\u00f3 th\u1ec3 th\u00eam d\u1ea5u ch\u1ea5m v\u00e0o gi\u1eefa ph\u1ea7n k\u00eanh v\u00e0 bit \u0111\u1ed3ng th\u1eddi b\u1ecf c\u00e1c s\u1ed1 0 d\u01b0 c\u1ee7a ph\u1ea7n k\u00eanh, cu\u1ed1i c\u00f9ng \u0111\u1ecba ch\u1ec9 \u0111\u00f3 th\u1ec3 hi\u1ec7n l\u00e0 0.03. Th\u00f4ng tin ON\/OFF ghi v\u00e0o b\u1ed9 nh\u1edb I\/O d\u01b0\u1edbi d\u1ea1ng 2 tr\u1ea1ng th\u00e1i 1 ho\u1eb7c 0
\n\"dia<\/a>
\n 
\n <\/p>\n","protected":false},"excerpt":{"rendered":"

T\u00ean c\u00e1c b\u1ed9 ph\u1eadn LED ch\u1ec9 th\u1ecb tr\u1ea1ng th\u00e1i ho\u1ea1t \u0111\u1ed9ng c\u1ee7a CPU. \u0110\u00e8n LED hi\u1ec3n th\u1ecb tr\u00ean CPU c\u00f3 th\u1ec3 d\u00f9ng \u0111\u1ec3 x\u00e1c \u0111\u1ecbnh tr\u1ea1ng th\u00e1i ho\u1ea1t \u0111\u1ed9ng c\u1ee7a b\u1ed9 \u0111i\u1ec1u khi\u1ec3n (PLC). POWER hi\u1ec3n th\u1ecb tr\u1ea1ng th\u00e1i ngu\u1ed3n c\u1ee7a PLC. V\u00ed d\u1ee5, khi pin kh\u00f4ng k\u1ebft n\u1ed1i ho\u1eb7c \u0111i\u1ec7n \u00e1p b\u1ecb th\u1ea5p, ho\u1ea1t […]<\/p>\n","protected":false},"author":2,"featured_media":19294,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[13220],"tags":[13226,13227,13228,13230,13231,13229,13232],"class_list":["post-19293","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-cach-lap-trinh-plc","tag-cach-dau-day-cho-plc","tag-cau-hinh-plc","tag-cau-tao-plc","tag-dau-cam-bien-cho-plc","tag-dau-cong-tac-cho-plc","tag-dau-day-input-plc","tag-su-khac-nhau-giua-pnp-va-npn"],"_links":{"self":[{"href":"https:\/\/hunglong.banbientan.com\/index.php?rest_route=\/wp\/v2\/posts\/19293","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/hunglong.banbientan.com\/index.php?rest_route=\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/hunglong.banbientan.com\/index.php?rest_route=\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/hunglong.banbientan.com\/index.php?rest_route=\/wp\/v2\/users\/2"}],"replies":[{"embeddable":true,"href":"https:\/\/hunglong.banbientan.com\/index.php?rest_route=%2Fwp%2Fv2%2Fcomments&post=19293"}],"version-history":[{"count":0,"href":"https:\/\/hunglong.banbientan.com\/index.php?rest_route=\/wp\/v2\/posts\/19293\/revisions"}],"wp:attachment":[{"href":"https:\/\/hunglong.banbientan.com\/index.php?rest_route=%2Fwp%2Fv2%2Fmedia&parent=19293"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/hunglong.banbientan.com\/index.php?rest_route=%2Fwp%2Fv2%2Fcategories&post=19293"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/hunglong.banbientan.com\/index.php?rest_route=%2Fwp%2Fv2%2Ftags&post=19293"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}