{"id":22694,"date":"2019-08-20T03:32:07","date_gmt":"2019-08-19T20:32:07","guid":{"rendered":"https:\/\/banbientan.com\/?p=22694"},"modified":"2019-08-20T03:32:07","modified_gmt":"2019-08-19T20:32:07","slug":"bang-ma-loi-bien-tan-fuji-cac-loi-cua-bien-tan-fuji-thuong-gap","status":"publish","type":"post","link":"https:\/\/hunglong.banbientan.com\/?p=22694","title":{"rendered":"B\u1ea3ng m\u00e3 l\u1ed7i bi\u1ebfn t\u1ea7n Fuji, C\u00e1c l\u1ed7i c\u1ee7a bi\u1ebfn t\u1ea7n Fuji th\u01b0\u1eddng g\u1eb7p"},"content":{"rendered":"

\"FUJI<\/a>
FUJI FRENIC ECO<\/figcaption><\/figure>
\nPh\u1ea7n 1:<\/p>\n
    \n
  • OC 1 \u2013 Overcurrent (Qu\u00e1 d\u00f2ng)<\/li>\n
  • OV 1 \u2013 Overvoltage (Qu\u00e1 \u00e1p)<\/li>\n
  • LU \u2013 Undervoltage (B\u1ea3o v\u1ec7 th\u1ea5p \u00e1p)<\/li>\n
  • L in \u2013 Input Phase Loss<\/li>\n<\/ul>\n
      \n
    1. \n

      Overcurrent (L\u1ed7i qu\u00e1 d\u00f2ng) \u2013\u00a0OC 1<\/h4>\n<\/li>\n<\/ol>\n\n\n\n\n\n\n\n\n\n
      <\/td>\nL\u00fd do c\u00f3 th\u1ec3 g\u00e2y ra<\/td>\nC\u00e1ch ki\u1ec3m tra v\u00e0 \u0111\u1ec1 xu\u1ea5t gi\u1ea3i ph\u00e1p<\/td>\n<\/tr>\n
      1<\/td>\nNg\u00f5 ra b\u1ecb ng\u1eafn m\u1ea1ch<\/td>\n-Th\u00e1o terminal (U, V, W) t\u1eeb ng\u00f5 ra c\u1ee7a Bi\u1ebfn t\u1ea7n, ki\u1ec3m tra \u0111i\u1ec7n tr\u1edf gi\u1eefa c\u00e1c pha, ki\u1ec3m tra khi \u0111i\u1ec7n tr\u1edf qu\u00e1 th\u1ea5p.
      \n\u2013 G\u1ee1 b\u1ed9 ph\u1eadn n\u00e0o l\u00e0m ng\u1eafn m\u1ea1ch.<\/td>\n<\/tr>\n
      2<\/td>\nM\u1ea5t mass t\u1eeb ng\u00f5 ra c\u1ee7a bi\u1ebfn t\u1ea7n<\/td>\nTh\u00e1o terminal (U, V, W) t\u1eeb ng\u00f5 ra c\u1ee7a bi\u1ebfn t\u1ea7n, ki\u1ec3m tra b\u1eb1ng \u0111\u1ed3ng h\u1ed3 MegaOhm.
      \nG\u1ee1 b\u1ed9 ph\u1eadn n\u00e0o l\u00e0m ng\u1eafn m\u1ea1ch<\/td>\n<\/tr>\n
      3<\/td>\nT\u1ea3i qu\u00e1 n\u1eb7ng<\/td>\nKi\u1ec3m tra d\u00f2ng c\u1ee7a \u0111\u1ed9ng c\u01a1 v\u1edbi thi\u1ebft b\u1ecb ki\u1ec3m tra, ghi l\u1ea1i d\u1ea1ng t\u00edn hi\u1ec7u.
      \nS\u1eed d\u1ee5ng c\u00e1c th\u00f4ng tin \u0111\u1ec3 ph\u00e1n x\u00e9t n\u1ebfu d\u00f2ng t\u1ea3i l\u1edbn h\u01a1n thi\u1ebft k\u1ebf. N\u1ebfu t\u1ea3i qu\u00e1 n\u1eb7ng th\u00ec thay bi\u1ebfn t\u1ea7n c\u1ea5p l\u1edbn h\u01a1n.
      \nKi\u1ec3m tra \u0111\u1eb7t tuy\u1ebfn c\u1ee7a d\u00f2ng \u0111i\u1ec7n, n\u1ebfu c\u00f3 s\u1ef1 thay \u0111\u1ed5i \u0111\u1ed9t ng\u1ed9t th\u00ec thay bi\u1ebfn t\u1ea7n c\u1ea5p l\u1edbn h\u01a1n.<\/td>\n<\/tr>\n
      4<\/td>\nTh\u1eddi gian t\u0103ng t\u1ed1c hay gi\u1ea3m t\u1ed1c qu\u00e1 ng\u1eafn<\/td>\nKi\u1ec3m tra kh\u1edfi \u0111\u1ed9ng c\u1ee7a \u0111\u1ed9ng c\u01a1 c\u00f3 \u0111\u1ee7 moment trong su\u1ed1t qu\u00e1 tr\u00ecnh t\u0103ng t\u1ed1c hay gi\u1ea3m t\u1ed1c hay kh\u00f4ng.
      \nMoment \u0111\u01b0\u1ee3c t\u00ednh t\u1eeb moment qu\u00e1n t\u00ednh c\u1ee7a t\u1ea3i v\u00e0 th\u1eddi gian t\u0103ng gi\u1ea3m t\u1ed1c.<\/td>\n<\/tr>\n
      5<\/td>\nT\u00edn hi\u1ec7u nhi\u1ec5u l\u1edbn g\u00e2y ra cho bi\u1ebfn t\u1ea7n<\/td>\nKi\u1ec3m tra l\u1eafp \u0111\u1eb7t bi\u1ebfn t\u1ea7n sao cho ph\u00f9 h\u1ee3p v\u1edbi \u0111i\u1ec1u ki\u1ec7n m\u00f4i tr\u01b0\u1eddng l\u00e0m vi\u1ec7c.
      \nC\u00f3 bi\u1ec7n ph\u00e1p ch\u1ed7ng nhi\u1ec5u.<\/td>\n<\/tr>\n
      6<\/td>\nC\u00e0i \u0111\u1eb7t th\u00f4ng s\u1ed1 \u0111\u1ed9ng c\u01a1 kh\u00f4ng h\u1ee3p l\u1ec7.<\/td>\nKi\u1ec3m tra h\u00e0m th\u00f4ng s\u1ed1 \u0111\u1ed9ng c\u01a1.
      \nC\u00e0i \u0111\u1eb7t \u0111\u00fang v\u1edbi nameplate c\u1ee7a \u0111\u1ed9ng c\u01a1<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n
        \n
      1. \n

        Overvoltage (L\u1ed7i qu\u00e1 \u00e1p) \u2013\u00a0OV 1<\/h4>\n<\/li>\n<\/ol>\n\n\n\n\n\n\n\n\n\n
        <\/td>\nL\u00fd do c\u00f3 th\u1ec3 g\u00e2y ra<\/td>\nC\u00e1ch ki\u1ec3m tra v\u00e0 \u0111\u1ec1 xu\u1ea5t gi\u1ea3i ph\u00e1p<\/td>\n<\/tr>\n
        1<\/td>\nNgu\u1ed3n v\u00e0o l\u1edbn h\u01a1n so v\u1edbi th\u00f4ng s\u1ed1 c\u1ee7a \u0111\u1ed9ng c\u01a1.<\/td>\nKi\u1ec3m tra \u0111i\u1ec7n \u00e1p ng\u00f5 v\u00e0o.
        \nN\u1ebfu l\u1edbn h\u01a1n th\u00ec gi\u1ea3m sao cho ph\u00f9 h\u1ee3p.<\/td>\n<\/tr>\n
        2<\/td>\nC\u00f3 m\u1ed9t xung nhi\u1ec5u t\u00e1c \u0111\u1ed9ng v\u00e0o ngu\u1ed3n<\/td>\nNgu\u1ed3n cung c\u1ea5p b\u1edfi t\u1ee5 l\u1ecdc khi \u0111\u01b0\u1ee3c t\u1eaft h\u1eb7c m\u1edf ho\u1eb7c khi thyristor \u0111\u00f3ng ng\u1eaft c\u00f3 th\u1ec3 g\u00e2y nhi\u1ec5u cho ngu\u1ed3n v\u00e0o.
        \nL\u1eafp th\u00eam cu\u1ed9n l\u1ecdc nhi\u1ec5u \u1edf ng\u00f5 v\u00e0o (DC reactor).<\/td>\n<\/tr>\n
        3<\/td>\nTh\u1eddi gian gi\u1ea3m t\u1ed1c qu\u00e1 ng\u1eafn k\u1ebft
        \nh\u1ee3p v\u1edbi t\u1ea3i<\/td>\n        		T\u00ednh to\u00e1n l\u1ea1i th\u1eddi gian h\u00e3m t\u1eeb th\u00f4ng s\u1ed1 t\u1ea3i v\u00e0 m\u00f4men h\u00e3m.
        \nThay \u0111\u1ed5i th\u1eddi gian h\u00e3m.<\/td>\n<\/tr>\n
        4<\/td>\nT\u1ea3i tr\u1ecdng qu\u00e1 n\u0103ng.<\/td>\nSo s\u00e1nh m\u00f4men h\u00e3m c\u1ee7a t\u1ea3i v\u1edbi bi\u1ebfn t\u1ea7n.
        \nCh\u1ecdn \u0111i\u1ec7n tr\u1edf x\u1ea3 nh\u1ecf\u00a0g\u1eafn v\u00e0o bi\u1ebfn t\u1ea7n.
        \nThay bi\u1ebfn t\u1ea7n c\u1ea5p l\u1edbn h\u01a1n.<\/td>\n<\/tr>\n
        5<\/td>\nT\u00edn hi\u1ec7u nhi\u1ec5u l\u1edbn g\u00e2y ra cho bi\u1ebfn t\u1ea7n<\/td>\nKi\u1ec3m tra l\u1eafp \u0111\u1eb7t bi\u1ebfn t\u1ea7n sao cho ph\u00f9 h\u1ee3p v\u1edbi \u0111i\u1ec1u ki\u1ec7n m\u00f4i tr\u01b0\u1eddng l\u00e0m vi\u1ec7c.
        \nC\u00f3 bi\u1ec7n ph\u00e1p ch\u1ed1ng nhi\u1ec5u<\/td>\n<\/tr>\n
        6<\/td>\nKh\u00f4ng k\u1ebft n\u1ed1i \u0111\u01b0\u1ee3c v\u1edbi \u0111i\u1ec7n tr\u1edf<\/td>\nKi\u1ec3m tra \u0111i\u1ec7n tr\u1edf h\u00e3m g\u1eafn v\u00e0o bi\u1ebfn t\u1ea7n c\u00f3 \u0111\u00fang hay kh\u00f4ng.
        \n\u0110i\u1ec7n tr\u1edf h\u00e3m g\u1eafn v\u00e0o terminal (P+) v\u00e0 (BD)<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n
          \n
        1. \n

          Undervoltage (L\u1ed7i b\u1ea3o v\u1ec7 th\u1ea5p \u00e1p) \u2013\u00a0LU<\/h4>\n<\/li>\n<\/ol>\n\n\n\n\n\n\n\n\n
          <\/td>\nL\u00fd do c\u00f3 th\u1ec3 g\u00e2y ra<\/td>\nC\u00e1ch ki\u1ec3m tra v\u00e0 \u0111\u1ec1 xu\u1ea5t gi\u1ea3i ph\u00e1p<\/td>\n<\/tr>\n
          1<\/td>\nL\u1ed7i t\u1ee9c th\u1eddi<\/td>\nReset bi\u1ebfn t\u1ea7n.<\/td>\n<\/tr>\n
          2<\/td>\n\u0110i\u1ec7n \u00e1p c\u1ee7a ngu\u1ed3n kh\u00f4ng \u0111\u00fang v\u1edbi th\u00f4ng s\u1ed1 c\u1ee7a bi\u1ebfn t\u1ea7n<\/td>\nKi\u1ec3m tra ng\u00f5 v\u00e0o
          \nT\u0103ng \u0111i\u1ec7n \u00e1p ng\u00f5 v\u00e0o cho ph\u00f9 h\u1ee3p v\u1edbi th\u00f4ng s\u1ed1 c\u1ee7a bi\u1ebfn t\u1ea7n.<\/td>\n<\/tr>\n
          3<\/td>\nM\u1ea1ch ngu\u1ed3n b\u1ecb l\u1ed7i hay k\u1ebft n\u1ed1i b\u1ecb l\u1ed7i.<\/td>\nKi\u1ec3m tra ng\u00f5 v\u00e0o ra<\/td>\n<\/tr>\n
          4<\/td>\nS\u1ee5t \u00e1p do c\u00f3 t\u1ea3i b\u00ean ngo\u00e0i<\/td>\nKi\u1ec3m tra \u0111i\u1ec7n \u00e1p ng\u00f5 v\u00e0o v\u00e0 ki\u1ec3m tra bi\u1ebfn thi\u00ean c\u1ee7a \u0111i\u1ec7n \u00e1p.<\/td>\n<\/tr>\n
          5<\/td>\nD\u00f2ng kh\u1edfi \u0111\u1ed9ng c\u1ee7a \u0111\u1ed9ng c\u01a1 l\u00e0m cho s\u1ee5t \u00e1p ngu\u1ed3n v\u00ec ngu\u1ed3n \u0111i\u1ec7n kh\u00f4ng \u0111\u1ee7.<\/td>\nKi\u1ec3m ra \u0111i\u1ec7n \u00e1p ng\u00f5 v\u00e0o , ki\u1ec3m tra t\u1ee5<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n
            \n
          1. \n

            Input phase loss (L\u1ed7i m\u1ea5t pha v\u00e0o) \u2013\u00a0L in<\/h4>\n<\/li>\n<\/ol>\n\n\n\n\n\n\n\n
            <\/td>\nL\u00fd do c\u00f3 th\u1ec3 g\u00e2y ra<\/td>\nC\u00e1ch ki\u1ec3m tra v\u00e0 \u0111\u1ec1 xu\u1ea5t gi\u1ea3i ph\u00e1p<\/td>\n<\/tr>\n
            1<\/td>\nD\u00e2y ngu\u1ed3n v\u00e0o b\u1ecb \u0111\u1ee9t.<\/td>\nKi\u1ec3m tra ng\u00f5 v\u00e0o.
            \n\u0110\u1ee9t d\u00e2y th\u00ec thay d\u00e2y.<\/td>\n<\/tr>\n
            2<\/td>\nV\u00edt terminal c\u1ee7a m\u1ea1ch ngu\u1ed3n v\u00e0 bi\u1ebfn t\u1ea7n ch\u01b0a \u0111\u01b0\u1ee3c v\u1eb7n ch\u1eb7t<\/td>\nKi\u1ec3m tra v\u00edt, si\u1ebft ch\u1eb7t\u00a0v\u00edt.<\/td>\n<\/tr>\n
            3<\/td>\nM\u1ea5t c\u00e2n b\u1eb1ng gi\u1eefa ba pha hay \u0111i\u1ec7n \u00e1p ba pha qu\u00e1 l\u1edbn.<\/td>\nKi\u1ec3m tra \u0111i\u1ec7n \u00e1p ng\u00f5 v\u00e0o
            \nThay bi\u1ebfn t\u1ea7n l\u1edbn h\u01a1n.<\/td>\n<\/tr>\n
            4<\/td>\nQu\u00e1 t\u1ea3i th\u01b0\u1eddng xuy\u00ean x\u1ea3y ra.<\/td>\nKi\u1ec3m tra \u0111\u1ed9 g\u1ee3n s\u00f3ng c\u1ee7a m\u1ea1ch ch\u1ec9nh l\u01b0u.
            \nN\u1ebfu \u0111\u1ed9 g\u1ee3n s\u00f3ng qu\u00e1 l\u1edbn th\u00ec t\u0103ng t\u1ee5 l\u1ecdc.<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n

            Ph\u1ea7n 2:\u00a0(Xem chi ti\u1ebft t\u1ea1i \u0111\u00e2y)<\/p>\n

              \n
            • OH 1 \u2013 Cooling Fan Overheat (B\u1ea3o v\u1ec7 qu\u00e1 nhi\u1ec7t)<\/li>\n
            • OH 2 \u2013 External Alarm (L\u1ed7i ngo\u1ea1i vi)<\/li>\n
            • OH 3 \u2013 Inverter inside Overheat (Qu\u00e1 nhi\u1ec7t b\u00ean trong Bi\u1ebfn t\u1ea7n)<\/li>\n
            • OH 4 \u2013 Motor Protection<\/li>\n<\/ul>\n
                \n
              1. \n

                L\u1ed7i OH1 \u2013 Cooling fan overheat (B\u1ea3o v\u1ec7 qu\u00e1 nhi\u1ec7t)<\/h4>\n<\/li>\n<\/ol>\n\n\n\n\n\n\n\n
                <\/td>\nL\u00fd do c\u00f3 th\u1ec3 g\u00e2y ra<\/td>\nC\u00e1ch ki\u1ec3m tra v\u00e0 \u0111\u1ec1 xu\u1ea5t gi\u1ea3i ph\u00e1p<\/td>\n<\/tr>\n
                1<\/td>\nNhi\u1ec7t \u0111\u1ed9 c\u1ee7a bi\u1ebfn t\u1ea7n v\u01b0\u1ee3t qu\u00e1 nhi\u1ec7t \u0111\u1ed9 cho ph\u00e9p<\/td>\nKi\u1ec3m tra nhi\u1ec7t \u0111\u1ed9 xung quanh bi\u1ebfn t\u1ea7n<\/td>\n<\/tr>\n
                2<\/td>\nC\u1eeda th\u00f4ng gi\u00f3 b\u1ecb \u0111\u00f3ng ngh\u1ebdn<\/td>\nL\u00e0m s\u1ea1ch bi\u1ebfn t\u1ea7n
                \nKi\u1ec3m tra b\u1ed9 l\u00e0m m\u00e1t c\u00f3 b\u1ecb ngh\u1eb9t hay kh\u00f4ng<\/td>\n<\/tr>\n
                3<\/td>\nTh\u1eddi gian l\u00e0m vi\u1ec7c c\u1ee7a qu\u1ea1t l\u00e0m m\u00e1t v\u01b0\u1ee3t qu\u00e1 m\u1ee9c b\u00ecnh th\u01b0\u1eddng, hay qu\u1ea1t l\u00e0m m\u00e1t b\u1ecb l\u1ed7i<\/td>\nKi\u1ec3m tra th\u1eddi gian l\u00e0m vi\u1ec7c c\u1ee7a qu\u1ea1t. Thay qu\u1ea1t.
                \nKi\u1ec3m tra b\u1eb1ng m\u1eaft xem qu\u1ea1t quay c\u00f3 b\u1ea5t th\u01b0\u1eddng hay kh\u00f4ng<\/td>\n<\/tr>\n
                4<\/td>\nT\u1ea3i qu\u00e1 n\u1eb7ng<\/td>\nKi\u1ec3m tra d\u00f2ng ng\u00f5 ra.<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n
                  \n
                1. \n

                  L\u1ed7i OH2 \u2013 External alarm (l\u1ed7i ngo\u1ea1i vi)<\/h4>\n<\/li>\n<\/ol>\n\n\n\n\n\n\n
                  <\/td>\nL\u00fd do c\u00f3 th\u1ec3 g\u00e2y ra<\/td>\nC\u00e1ch ki\u1ec3m tra v\u00e0 \u0111\u1ec1 xu\u1ea5t gi\u1ea3i ph\u00e1p<\/td>\n<\/tr>\n
                  1<\/td>\nH\u00e0m b\u00e1o l\u1ed7i c\u1ee7a thi\u1ebft b\u1ecb b\u00ean ngo\u00e0i<\/td>\nKi\u1ec3m tra xem thi\u1ebft b\u1ecb b\u00ean ngo\u00e0i c\u00f3 ho\u1ea1t \u0111\u1ed9ng hay kh\u00f4ng.
                  \nG\u1ee1 thiets b\u1ecb n\u00e0o g\u00e2y n\u00ean l\u1ed7i.<\/td>\n<\/tr>\n
                  2<\/td>\nL\u1ed7i k\u1ebft n\u1ed1i<\/td>\nKi\u1ec3m tra n\u1ebfu \u0111\u01b0\u1eddng b\u00e1o l\u1ed7i c\u00f3 k\u1ebft n\u1ed1i \u0111\u00fang v\u1edbi terminal (External failure) (E01-08, E98, E99 set to 9)<\/td>\n<\/tr>\n
                  3<\/td>\nC\u00e0i \u0111\u1eb7t sai<\/td>\nC\u00e0i \u0111\u1eb7t l\u1ea1i.<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n
                    \n
                  1. \n

                    L\u1ed7i OH3 \u2013 Inverter inside overheat (Qu\u00e1 nhi\u1ec7t b\u00ean trong bi\u1ebfn t\u1ea7n)<\/h4>\n<\/li>\n<\/ol>\n\n\n\n\n
                    <\/td>\nL\u00fd do c\u00f3 th\u1ec3 g\u00e2y ra<\/td>\nC\u00e1ch ki\u1ec3m tra v\u00e0 \u0111\u1ec1 xu\u1ea5t gi\u1ea3i ph\u00e1p<\/td>\n<\/tr>\n
                    1<\/td>\nNhi\u1ec7t \u0111\u1ed9 m\u00f4i tr\u01b0\u1eddng v\u01b0\u1ee3t qu\u00e1 gi\u1edbi h\u1ea1n cho ph\u00e9p c\u1ee7a bi\u1ebfn t\u1ea7n<\/td>\nKi\u1ec3m tra nhi\u1ec7t \u0111\u1ed9 m\u00f4i tr\u01b0\u1eddng
                    \nC\u1ea3i t\u1ea1o nhi\u1ec7t \u0111\u1ed9 m\u00f4i tr\u01b0\u1eddng b\u1eb1ng c\u00e1ch c\u1ea3i t\u1ea1o h\u1ec7 th\u1ed1ng qu\u1ea1t gi\u00f3 l\u00e0m m\u00e1t bi\u1ebfn t\u1ea7n<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n
                      \n
                    1. \n

                      OH4 \u2013 Motor protection<\/h4>\n<\/li>\n<\/ol>\n\n\n\n\n\n
                      <\/td>\nL\u00fd do c\u00f3 th\u1ec3 g\u00e2y ra<\/td>\nC\u00e1ch ki\u1ec3m tra v\u00e0 \u0111\u1ec1 xu\u1ea5t gi\u1ea3i ph\u00e1p<\/td>\n<\/tr>\n
                      1<\/td>\nNhi\u1ec7t \u0111\u1ed9 xung quanh motor v\u01b0\u1ee3t qu\u00e1 nhi\u1ec7t \u0111\u1ed9 cho ph\u00e9p c\u1ee7a \u0111\u1ed9ng c\u01a1<\/td>\nKi\u1ec3m tra nhi\u1ec7t \u0111\u1ed9 xung quanh \u0111\u1ed9ng c\u01a1<\/td>\n<\/tr>\n
                      2<\/td>\nH\u1ec7 th\u00f3ng qu\u1ea1t l\u00e0m m\u00e1<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n

                      Ph\u1ea7n 3:\u00a0(Xem chi ti\u1ebft t\u1ea1i \u0111\u00e2y)<\/p>\n

                        \n
                      • OL 1 \u2013\u00a0Motor Overload<\/li>\n
                      • OLU \u2013 Inverter\u00a0Overload<\/li>\n
                      • Er 1 \u2013 Memory Error<\/li>\n
                      • Er 2 \u2013 Keypad Communication (L\u1ed7i giao ti\u1ebfp b\u00e0n ph\u00edm)<\/li>\n
                      • Er 3 \u2013 CPU Error (l\u1ed7i CPU)<\/li>\n<\/ul>\n

                        1. OL 1 \u2013 Motor Overload<\/h3>\n\n\n\n\n\n\n
                        <\/td>\nPossible causes<\/td>\n 
                        \nchecking & fixing<\/td>\n<\/tr>\n
                        \n

                        1<\/p>\n<\/td>\n

                        		Engine temperature exceeds the permitted level.<\/td>\nCheck engine value.
                        \nChange function parameters F10 and F12.<\/td>\n<\/tr>\n
                        \n

                        2<\/p>\n<\/td>\n

                        		Motor protection parameters are not suitable.<\/td>\nContinue to check the engine\u2019s permissible line. Change parameters of function F11.<\/td>\n<\/tr>\n
                        \n

                        3<\/p>\n<\/td>\n

                        		Load too heavy<\/td>\nCheck the output line.
                        \nChanging parameters depends on the load<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n

                        2.\u00a0 OLU \u2013 Inverter Overload<\/h3>\n\n\n\n\n\n\n\n
                        <\/td>\nPossible causes<\/td>\nchecking & fixing<\/td>\n<\/tr>\n
                        \n

                        1<\/p>\n<\/td>\n

                        		Engine temperature exceeds the permitted level.<\/td>\nCheck the room temperature. Cooling the inverter.<\/td>\n<\/tr>\n
                        \n

                        2<\/p>\n<\/td>\n

                        		Load too heavy<\/td>\nCheck the output line.
                        \nDefine the parameters of the F26 function.<\/td>\n<\/tr>\n
                        \n

                        3<\/p>\n<\/td>\n

                        		Ventilation door is blocked.<\/td>\nCheck and clean.
                        \nCheck the inverter cooling fan<\/td>\n<\/tr>\n
                        \n

                        4<\/p>\n<\/td>\n

                        		The working time of the cooling fan is prolonged or due to the fan life.<\/td>\nchecking the fan, replace if necessary<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n

                        3. Er 1 \u2013 Memory error<\/h3>\n\n\n\n\n\n\n
                        <\/td>\nPossible causes<\/td>\nchecking & fixing<\/td>\n<\/tr>\n
                        \n

                        1<\/p>\n<\/td>\n

                        		While the drive is recording data (especially if it is installing or copying data), power is lost or voltage drop.<\/td>\nTesting by pressing the RESET key can be reset and then the control code is reset by reinstalling the H03 function code to 1. Return to the original installation function code and start the installation again.<\/td>\n<\/tr>\n
                        \n

                        2<\/p>\n<\/td>\n

                        		Large noise signals are caused to the Inverter when It records data.<\/td>\nCheck the installation of inverter in accordance with the working environment conditions, can be checked as (1).
                        \nTake measures against noise.
                        \nReturn to the original installation function code and start rooting again.<\/td>\n<\/tr>\n
                        3<\/td>\nThe control circuit is faulty.<\/td>\nReinstall the function code by setting the H03 function to 1, reset the fault by pressing the RESET key.
                        \nThis error is caused by the fault of the circuit. Contact Fuji.<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n

                        4. Er 2 \u2013 Keypad communication<\/h3>\n\n\n\n\n\n\n
                        <\/td>\nPossible causes<\/td>\nchecking & fixing<\/td>\n<\/tr>\n
                        1<\/td>\nThe cable is broken or there is a connection problem.<\/td>\nCheck the cable. Cable ends and contacts. Replace the cable<\/td>\n<\/tr>\n
                        2<\/td>\nLarge noise signal caused to the drive.<\/td>\nCheck the installation of the inverter in accordance with the working environment conditions. Take appropriate anti-noise solutions<\/td>\n<\/tr>\n
                        3<\/td>\nThe keyboard has a problem<\/td>\nTry changing the other keyboard for the drive to see if it still gives an error. If it does not report an Er2 error , the keyboard was fail.
                        \nReplace the new keyboard.<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n

                        Ph\u1ea7n 4\u00a0(Xem chi ti\u1ebft t\u1ea1i \u0111\u00e2y)<\/p>\n

                          \n
                        • Er 4 \u2013 Option Communication Error<\/li>\n
                        • Er 5 \u2013 Option Error<\/li>\n
                        • Er 6 \u2013 Run Operation Error<\/li>\n
                        • Er 7 \u2013 Tuning Error<\/li>\n<\/ul>\n

                          1.Er 4 \u2013\u00a0Option comunications error<\/h3>\n\n\n\n\n\n\n
                          <\/td>\n\u00a0L\u00fd do c\u00f3 th\u1ec3 g\u00e2y ra<\/td>\n\u00a0C\u00e1ch ki\u1ec3m tra v\u00e0 \u0111\u1ec1 xu\u1ea5t gi\u1ea3i ph\u00e1p<\/td>\n<\/tr>\n
                          1<\/td>\nC\u00f3 v\u1ea5n \u0111\u1ec1 v\u1ec1 k\u1ebft n\u1ed1i gi\u1eefa option card v\u00e0 bi\u1ebfn t\u1ea7n.<\/td>\n\u00a0Ki\u1ec3m tra k\u1ebft n\u1ed1i gi\u1eefa card option v\u1edbi bi\u1ebfn t\u1ea7n.<\/td>\n<\/tr>\n
                          2<\/td>\nC\u00f3 t\u00edn hi\u1ec7u nhi\u1ec5u l\u1edbn t\u1eeb m\u00f4i tr\u01b0\u1eddng b\u00ean ngo\u00e0i.<\/td>\n\u00a0Ki\u1ec3m tra l\u1eafp \u0111\u1eb7t bi\u1ebfn t\u1ea7n sao cho ph\u00f9 h\u1ee3p v\u1edbi \u0111i\u1ec1u ki\u1ec7n \u00a0m\u00f4i tr\u01b0\u1eddng l\u00e0m vi\u1ec7c.
                          \nC\u00f3 bi\u1ec7n ph\u00e1p ch\u1ed1ng nhi\u1ec5u.<\/td>\n<\/tr>\n
                          3<\/td>\nC\u00f3 m\u1ed9t v\u00e0i l\u1ed7i c\u1ee7a d\u00e2y k\u1ebft n\u1ed1i gi\u1eefa encoder v\u1edbi card option.<\/td>\n\u00a0Ki\u1ec3m tra encoder v\u00e0 option card v\u00e0 c\u00e1ch k\u1ebft n\u1ed1i cho \u00a0ch\u00ednh x\u00e1c. Ki\u1ec3m tra d\u00e2y.<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n

                          2.Er 5 \u2013\u00a0Option error<\/h3>\n\n\n\n\n\n\n
                          <\/td>\n\u00a0L\u00fd do c\u00f3 th\u1ec3 g\u00e2y ra<\/td>\n\u00a0C\u00e1ch ki\u1ec3m tra v\u00e0 \u0111\u1ec1 xu\u1ea5t gi\u1ea3i ph\u00e1p<\/td>\n<\/tr>\n
                          \n

                          1<\/p>\n<\/td>\n

                          		\u00a0L\u1ed7i encoder.<\/td>\n\u00a0Thay encoder m\u1edbi.<\/td>\n<\/tr>\n
                          \n

                          2<\/p>\n<\/td>\n

                          		\u00a0L\u1ed7i k\u1ebft n\u1ed1i encoder.<\/td>\n\u00a0Ki\u1ec3m tra<\/td>\n<\/tr>\n
                          \n

                          3<\/p>\n<\/td>\n

                          		\u00a0C\u00f3 m\u1ed9t v\u00e0i l\u1ed7i c\u1ee7a d\u00e2y k\u1ebft n\u1ed1i \u00a0gi\u1eefa encoder v\u1edbi card option.<\/td>\n\u00a0Ki\u1ec3m tra encoder v\u00e0 option card v\u00e0 c\u00e1ch k\u1ebft n\u1ed1i cho ch\u00ednh x\u00e1c.<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n

                          3. Er 6 \u2013 Run operation error<\/h3>\n\n\n\n\n\n
                          <\/td>\nL\u00fd do c\u00f3 th\u1ec3 g\u00e2y ra<\/td>\nC\u00e1ch ki\u1ec3m tra v\u00e0 \u0111\u1ec1 xu\u1ea5t gi\u1ea3i ph\u00e1p<\/td>\n<\/tr>\n
                          1<\/td>\nL\u1ed7i c\u00e0i \u0111\u1eb7t \u0111i\u1ec1u khi\u1ec3n t\u1ed1c \u0111\u1ed9 nhi\u1ec1u c\u1ea5p.<\/td>\nKi\u1ec3m tra c\u00e1c h\u00e0m t\u1eeb h\u00e0m L11 t\u1edbi L18. Thay \u0111\u1ed5i c\u1ea5u h\u00ecnh c\u00e0i \u0111\u1eb7t.<\/td>\n<\/tr>\n
                          2<\/td>\nB\u1ed9 h\u00e3m ho\u1ea1t \u0111\u00f4ng kh\u00f4ng \u0111\u00fang theo ch\u01b0\u01a1ng tr\u00ecnh \u0111i\u1ec1u khi\u1ec3n h\u00e3m.<\/td>\nKi\u1ec3m tra \u0111i\u1ec1u ki\u1ec7n c\u1ee7a t\u00edn hi\u1ec7u h\u00e3m v\u1edbi ch\u01b0\u01a1ng tr\u00ecnh \u0111i\u1ec1u khi\u1ec3n h\u00e3m.
                          \nC\u1ea5u h\u00ecnh l\u1ea1i h\u00e0m L84.<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n

                          4.Er 7 \u2013\u00a0Tuning error (l\u1ed7i do n\u1ed1i \u0111\u1ea7u ra)<\/h3>\n\n\n\n\n\n\n\n\n\n
                          <\/td>\nL\u00fd do c\u00f3 th\u1ec3 g\u00e2y ra<\/td>\n\u00a0C\u00e1ch ki\u1ec3m tra v\u00e0 \u0111\u1ec1 xu\u1ea5t gi\u1ea3i ph\u00e1p<\/td>\n<\/tr>\n
                          1<\/td>\nM\u1ea5t pha k\u1ebft n\u1ed1i gi\u1eefa bi\u1ebfn t\u1ea7n v\u00e0 \u0111\u1ed9ng c\u01a1<\/td>\n\u00a0Ki\u1ec3m tra contactor gi\u1eefa \u0111\u1ed9ng c\u01a1 v\u00e0 bi\u1ebfn t\u1ea7n.<\/td>\n<\/tr>\n
                          2<\/td>\nV\/f\u00a0\u00a0 hay d\u00f2ng \u0111i\u1ec7n \u0111\u1ecbnh m\u1ee9c c\u1ee7a\u00a0\u0111\u1ed9ng c\u01a1 ch\u01b0a \u0111\u01b0\u1ee3c c\u00e0i.<\/td>\n\u00a0Ki\u1ec3m tra h\u00e0m c\u00e0i \u0111\u1eb7t F04,F05,P02 v\u00e0 P03 c\u00f3 \u0111\u00fang v\u1edbi c\u00e1c \u0111\u1eb7t \u0111i\u1ec3m k\u1ef9 thu\u1eadt c\u1ee7a \u0111\u1ed9ng c\u01a1 kh\u00f4ng<\/td>\n<\/tr>\n
                          3<\/td>\nC\u00f4ng su\u1ea5t \u0111\u1ecbnh m\u1ee9c c\u1ee7a \u0111\u1ed9ng kh\u00f4ng t\u01b0\u01a1ng th\u00edch v\u1edbi bi\u1ebfn t\u1ea7n.<\/td>\nKi\u1ec3m tra c\u00f4ng su\u1ea5t \u0111\u1ecbnh m\u1ee9c c\u1ee7a \u0111\u1ed9ng c\u01a1 nh\u1ecf h\u01a1n c\u1ee7a bi\u1ebfn t\u1ea7n 3 hay nhi\u1ec1u c\u1ea5p.
                          \nXem l\u1ea1i c\u00f4ng su\u1ea5t bi\u1ebfn t\u1ea7n
                          \nC\u00e0i c\u00e1c h\u1ec7 s\u1ed1 c\u1ee7a \u0111\u1ed9ng c\u01a1 (P06, P07, P08 v\u00e0 P12) b\u1eb1ng tay.<\/td>\n<\/tr>\n
                          4<\/td>\n\u0110\u1ed9ng c\u01a1 \u0111\u1eb7c bi\u1ec7t<\/td>\nC\u00e0i c\u00e1c h\u1ec7 s\u1ed1 c\u1ee7a \u0111\u1ed9ng c\u01a1 (P06, P07, P08 v\u00e0 P12) b\u1eb1ng tay.<\/td>\n<\/tr>\n
                          5<\/td>\nL\u1ed7i\u00a0 trong qu\u00e1 tr\u00ecnh v\u1eadn h\u00e0nh<\/td>\nKh\u00f4ng nh\u1ea5n ph\u00edm STOP tr\u00ean b\u00e0n ph\u00edm trong l\u00fac tuning.<\/td>\n<\/tr>\n
                          6<\/td>\nD\u00f2ng qu\u00e1 t\u1ea3i b\u1ecb tr\u00f4i.<\/td>\nNg\u1eafn m\u1ea1ch hay b\u1ecb \u0111\u1ee9t d\u00e2y hay ch\u1ea1m mass.
                          \nKi\u1ec3m tra h\u00e0m c\u00e0i \u0111\u1eb7t (F04, F05,P02, v\u00e0 P03) c\u00f3 \u0111\u00fang v\u1edbi \u0111\u1eb7t t\u00ednh c\u1ee7a \u0111\u1ed9ng c\u01a1 kh\u00f4ng.<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n

                          Ph\u1ea7n 5\u00a0(Xem chi ti\u1ebft t\u1ea1i \u0111\u00e2y)<\/p>\n

                            \n
                          • Er 8 \u2013 RS485 Error<\/li>\n
                          • Er H \u2013 Hardware Error<\/li>\n
                          • ECF \u2013 EN terminal Circuit Error<\/li>\n
                          • PG \u2013 PG disconnection Error<\/li>\n<\/ul>\n
                              \n
                            1. \n

                              ER8 \u2013 RS485 Error<\/h3>\n<\/li>\n<\/ol>\n\n\n\n\n\n\n\n\n\n
                              <\/td>\n\n

                              L\u00fd do c\u00f3 th\u1ec3 g\u00e2y ra<\/p>\n<\/td>\n

                              		\n

                              C\u00e1ch ki\u1ec3m tra v\u00e0 \u0111\u1ec1 xu\u1ea5t gi\u1ea3i ph\u00e1p<\/p>\n<\/td>\n<\/tr>\n

                              1<\/td>\nChu\u1ea9n k\u1ebft n\u1ed1i gi\u1eefa Bi\u1ebfn t\u1ea7n v\u00e0 host kh\u00e1c nhau<\/td>\nSo s\u00e1nh c\u00e0i \u0111\u1eb7t h\u00e0m y (Y01, Y10) v\u1edbi host.
                              \nThay \u0111\u1ed5i c\u00e1i kh\u00e1c bi\u1ec7t \u0111\u00f3.<\/td>\n<\/tr>\n
                              2<\/td>\nM\u1eb7c d\u00f9 Y08 \u0111\u00e3 \u0111\u01b0\u1ee3c c\u00e0i \u0111\u1eb7t, nh\u01b0ng k\u1ebft n\u1ed1i kh\u00f4ng \u0111\u01b0\u1ee3c c\u00e0i \u0111\u1eb7t \u0111\u00fang nh\u01b0 quy tr\u00ecnh l\u00e0m vi\u1ec7c<\/td>\nKi\u1ec3m tra host.
                              \nThay \u0111\u1ed5i ph\u1ea7n m\u1ec1m cho Host, hay b\u1ecf qua l\u1ed7i \u0111\u00f3(Y08)<\/td>\n<\/tr>\n
                              3<\/td>\nHost \u0111i\u1ec1u khi\u1ec3n sai hay l\u1ed7i do ph\u1ea7m m\u1ec1m\/ ph\u1ea7n c\u1ee9ng<\/td>\nKi\u1ec3m tra host
                              \nTh\u00e1o host \u0111\u1ec3 ki\u1ec3m tra.<\/td>\n<\/tr>\n
                              4<\/td>\nB\u1ed9 chuy\u1ec3n \u0111\u1ed5i (RS485) kh\u00f4ng \u0111\u00fang gi\u1eefa k\u1ebft n\u1ed1i v\u00e0 c\u00e0i \u0111\u1eb7t hay l\u1ed7i ph\u1ea7n c\u1ee9ng<\/td>\nKi\u1ec3m tra RS485
                              \nThay \u0111\u1ed5i b\u1ed9 chuy\u1ec3n \u0111\u1ed5i RS485, k\u1ebft n\u1ed1i l\u1ea1i hay thay \u0111\u1ed5i ph\u1ea7n c\u1ee9ng.<\/td>\n<\/tr>\n
                              5<\/td>\nM\u1ea5t k\u1ebft n\u1ed1i do \u0111\u1ee9t c\u00e1p hay ti\u1ebfp x\u00fac kh\u00f4ng t\u1ed1t<\/td>\nKi\u1ec3m tra c\u00e1p, c\u00e1c \u0111i\u1ec3m ti\u1ebfp x\u00fac.
                              \nThay c\u00e1p<\/td>\n<\/tr>\n
                              6<\/td>\nT\u00edn hi\u1ec7u nhi\u1ec5u l\u1edbn g\u00e2y ra cho bi\u1ebfn t\u1ea7n<\/td>\nKi\u1ec3m tra l\u1eafp \u0111\u1eb7t bi\u1ebfn t\u1ea7n sao cho ph\u00f9 h\u1ee3p v\u1edbi \u0111i\u1ec1u ki\u1ec7n m\u00f4i tr\u01b0\u1eddng l\u00e0m vi\u1ec7c.
                              \nC\u00f3 bi\u1ec7n ph\u00e1p ch\u1ed1ng nhi\u1ec5u.
                              \nThay c\u00e1p RS485 cao h\u01a1n.<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n
                                \n
                              1. \n

                                ERH \u2013 Hardware Error<\/h3>\n<\/li>\n<\/ol>\n\n\n\n\n
                                <\/td>\n\n

                                L\u00fd do c\u00f3 th\u1ec3 g\u00e2y ra<\/p>\n<\/td>\n

                                		\n

                                C\u00e1ch ki\u1ec3m tra v\u00e0 \u0111\u1ec1 xu\u1ea5t gi\u1ea3i ph\u00e1p<\/p>\n<\/td>\n<\/tr>\n

                                1<\/td>\nCard option b\u1ecb h\u01b0<\/td>\nThay card option<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n
                                  \n
                                1. \n

                                  ECF \u2013 EN terminal Circuit Error<\/h3>\n<\/li>\n<\/ol>\n\n\n\n\n
                                  <\/td>\n\n

                                  L\u00fd do c\u00f3 th\u1ec3 g\u00e2y ra<\/p>\n<\/td>\n

                                  		\n

                                  C\u00e1ch ki\u1ec3m tra v\u00e0 \u0111\u1ec1 xu\u1ea5t gi\u1ea3i ph\u00e1p<\/p>\n<\/td>\n<\/tr>\n

                                  1<\/td>\nM\u1ea1ch b\u1ecb h\u01b0<\/td>\nThay \u0111\u1ed5i m\u1ea1ch \u0111i\u1ec1u khi\u1ec3n<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n
                                    \n
                                  1. \n

                                    PG \u2013 Disconnection Error<\/h3>\n<\/li>\n<\/ol>\n\n\n\n\n\n
                                    <\/td>\n\n

                                    L\u00fd do c\u00f3 th\u1ec3 g\u00e2y ra<\/p>\n<\/td>\n

                                    		\n

                                    C\u00e1ch ki\u1ec3m tra v\u00e0 \u0111\u1ec1 xu\u1ea5t gi\u1ea3i ph\u00e1p<\/p>\n<\/td>\n<\/tr>\n

                                    1<\/td>\nM\u1ed9t v\u00e0i t\u00edn hi\u1ec7u gi\u1eefa encoder v\u00e0 card option b\u1ecb \u0111\u1ee9t<\/td>\nKi\u1ec3m tra k\u1ebft n\u1ed1i gi\u1eefaencoder v\u00e0 card option.
                                    \nKi\u1ec3m tra \u0111\u01b0\u1eddng t\u00edn hi\u1ec7u gi\u1eefa terminals c\u1ee7a card option \u0111\u00fang v\u1edbi s\u00e1ch h\u01b0\u1edbng d\u1eabn.<\/td>\n<\/tr>\n
                                    2<\/td>\nT\u00edn hi\u1ec7u nhi\u1ec5u l\u1edbn g\u00e2y ra cho bi\u1ebfn t\u1ea7n<\/td>\nKi\u1ec3m tra l\u1eafp \u0111\u1eb7t Bi\u1ebfn t\u1ea7n sao cho ph\u00f9 h\u1ee3p v\u1edbi \u0111i\u1ec1u ki\u1ec7n m\u00f4i tr\u01b0\u1eddng l\u00e0m vi\u1ec7c.
                                    \nC\u00f3 bi\u1ec7n ph\u00e1p ch\u1ed1ng nhi\u1ec5u.<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n

                                    Ph\u1ea7n 6\u00a0(Xem chi ti\u1ebft t\u1ea1i \u0111\u00e2y)<\/p>\n

                                      \n
                                    • Er b- CAN Bus Communications Error<\/li>\n
                                    • OS \u2013 Over Speed Error<\/li>\n
                                    • ErE \u2013 Out of Control Speed<\/li>\n
                                    • OE \u2013 Over Torque Error<\/li>\n
                                    • PbF \u2013 Charger Circuit Fault<\/li>\n<\/ul>\n
                                        \n
                                      1. \n

                                        Erb \u2013\u00a0CAN bus comunications error<\/h3>\n<\/li>\n<\/ol>\n\n\n\n\n\n\n\n
                                        <\/td>\n\n

                                        L\u00fd do c\u00f3 th\u1ec3 g\u00e2y ra<\/p>\n<\/td>\n

                                        		\n

                                        C\u00e1ch ki\u1ec3m tra v\u00e0 \u0111\u1ec1 xu\u1ea5t gi\u1ea3i ph\u00e1p<\/p>\n<\/td>\n<\/tr>\n

                                        1<\/td>\nL\u1ed7i trong b\u1ed9 truy\u1ec1n \u0111\u1ed9ng<\/td>\nKi\u1ec3m tra k\u1ebf n\u1ed1i gi\u1eefa bi\u1ebfn t\u1ea7n (Y24) v\u00e0 Host.
                                        \n\u0110i\u1ec1u ch\u1ec9nh l\u1ea1i cho \u0111\u00fang.<\/td>\n<\/tr>\n
                                        2<\/td>\nB\u1ecb l\u1ed7i ph\u1ea7n c\u1ee9ng c\u1ee7a Host, h\u1ec7 \u0111i\u1ec1u h\u00e0nh ho\u1eb7c c\u1ea5u h\u00ednh<\/td>\nKi\u1ec3m tra Host
                                        \nS\u1eeda l\u1ed7i.<\/td>\n<\/tr>\n
                                        3<\/td>\nM\u1ea5t k\u1ebft n\u1ed1i hay k\u1ebft n\u1ed1i kh\u00f4ng \u0111\u01b0\u1ee3c \u1ed5n \u0111\u1ecbnh c\u1ee7a s\u1ee3i c\u00e1p<\/td>\nKi\u1ec3m tra c\u00e1p
                                        \nThay c\u00e1p<\/td>\n<\/tr>\n
                                        4<\/td>\nT\u00edn hi\u1ec7u nhi\u1ec5u l\u1edbn g\u00e2y ra cho Bi\u1ebfn t\u1ea7n<\/td>\nKi\u1ec3m tra l\u1eafp \u0111\u1eb7t Bi\u1ebfn t\u1ea7n sao cho ph\u00f9 h\u1ee3p v\u1edbi \u0111i\u1ec1u ki\u1ec7n m\u00f4i tr\u01b0\u1eddng l\u00e0m vi\u1ec7c.
                                        \nC\u00f3 bi\u1ec7n ph\u00e1p ch\u1ed1ng nhi\u1ec5u \u0111\u1ed1i v\u1edbi Host.<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n
                                          \n
                                        1. \n

                                          OS \u2013\u00a0Over speed error<\/h3>\n<\/li>\n<\/ol>\n\n\n\n\n\n\n
                                          <\/td>\n\n

                                          L\u00fd do c\u00f3 th\u1ec3 g\u00e2y ra<\/p>\n<\/td>\n

                                          		\n

                                          C\u00e1ch ki\u1ec3m tra v\u00e0 \u0111\u1ec1 xu\u1ea5t gi\u1ea3i ph\u00e1p<\/p>\n<\/td>\n<\/tr>\n

                                          1<\/td>\nL\u1ed7i c\u1ea5u h\u00ecnh \u0111\u1ed9ng c\u01a1<\/td>\nKi\u1ec3m tra m\u1ed1i t\u01b0\u01a1ng quan khi c\u00e0i \u0111\u1eb7t P01 v\u00e0 L02
                                          \nC\u00e0i P01 cho \u0111\u00fang v\u1edbi \u0111\u1eb7c tr\u01b0ng c\u1ee7a \u0111\u1ed9ng c\u01a1
                                          \nC\u00e0i L02 cho \u0111\u00fang v\u1edbi \u0111\u1ed9 ch\u00ednh x\u00e1c c\u1ee7a encoder
                                          \nKi\u1ec3m tra h\u00e0m F03 (Max Speed)<\/td>\n<\/tr>\n
                                          2<\/td>\nT\u00edn hi\u1ec7u nhi\u1ec5u l\u1edbn g\u00e2y ra cho Bi\u1ebfn t\u1ea7n<\/td>\nKi\u1ec3m tra l\u1eafp \u0111\u1eb7t Bi\u1ebfn t\u1ea7n sao cho ph\u00f9 h\u1ee3p v\u1edbi \u0111i\u1ec1u ki\u1ec7n m\u00f4i tr\u01b0\u1eddng l\u00e0m vi\u1ec7c.
                                          \nC\u00f3 bi\u1ec7n ph\u00e1p ch\u1ed1ng nhi\u1ec5u.<\/td>\n<\/tr>\n
                                          3<\/td>\nB\u1ed9 \u0111i\u1ec1u khi\u1ec3n b\u00ean ngo\u00e0i \u0111\u00e3 \u0111\u01b0u\u1ecdc s\u1eed d\u1ee5ng<\/td>\nKi\u1ec3m tra c\u00e1p, nhi\u1ec5u b\u1ed9 \u0111i\u1ec1u khi\u1ec3n t\u1ed1c \u0111\u1ed9 b\u00ean ngo\u00e0i.
                                          \nS\u1eed d\u1ee5ng c\u00e1p b\u1ecdc ch\u1ed1ng nhi\u1ec5u hay c\u00e1p xo\u1eafn \u0111\u00f4i cho \u0111\u01b0\u1eddng k\u1ebft n\u1ed1i t\u00edn hi\u1ec7u \u0111i\u1ec1u khi\u1ec3n
                                          \nKi\u1ec3m tra nhi\u1ec5u t\u1eeb bi\u1ebfn t\u1ea7n c\u00f3 th\u1ec3 \u1ea3nh h\u01b0\u1edfng nhi\u1ec5u cho t\u1ed1c \u0111\u1ed9 \u0111\u1ed9ng c\u01a1.<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n
                                            \n
                                          1. \n

                                            ErE \u2013\u00a0Out of control speed<\/h3>\n<\/li>\n<\/ol>\n\n\n\n\n\n\n\n\n\n\n
                                            <\/td>\n\n

                                            L\u00fd do c\u00f3 th\u1ec3 g\u00e2y ra<\/p>\n<\/td>\n

                                            		\n

                                            C\u00e1ch ki\u1ec3m tra v\u00e0 \u0111\u1ec1 xu\u1ea5t gi\u1ea3i ph\u00e1p<\/p>\n<\/td>\n<\/tr>\n

                                            1<\/td>\nC\u1ea5u h\u00ecnh b\u1ecb l\u1ed7i<\/td>\nKi\u1ec3m tra h\u00e0m c\u00e0i \u0111\u1eb7t L90, L91, L92
                                            \nN\u1ebfu bi\u00ean \u0111\u1ed9 c\u1ee7a t\u1ed1c \u0111\u1ed9 bi\u1ebfn thi\u00ean trong kho\u1ea3n cho ph\u00e9p, th\u00ec set h\u00e0m L90 th\u00e0nh 0
                                            \nKi\u1ec3m tra m\u1ed1i quan h\u1ec7 gi\u1eefa h\u00e0m P01 v\u00e0 L02.
                                            \nSet P01 ph\u00f9 h\u1ee3p v\u1edbi \u0111\u1ed9ng c\u01a1
                                            \nS\u00e9t L02 ph\u00f9 h\u1ee3 v\u1edbi encoder<\/td>\n<\/tr>\n
                                            2<\/td>\nQu\u00e1 t\u1ea3i<\/td>\nC\u00f3 bi\u1ec7n ph\u00e1p cho d\u00f2ng ng\u00f5 ra
                                            \nT\u1ea3i nh\u1ecf h\u01a1n
                                            \nKi\u1ec3m tra \u0111\u1eb7c t\u00ednh c\u01a1 c\u1ee7a b\u1ed9 h\u00e3m \u0111\u00e3 \u0111\u01b0\u1ee3c k\u00edch ho\u1ea1t hay ch\u01b0a<\/td>\n<\/tr>\n
                                            3<\/td>\nT\u1ed1c \u0111\u1ed9 ng\u00f5 ra kh\u00f4ng th\u1ec3 t\u0103ng l\u00ean b\u1edfi gi\u1edbi h\u1ea1n c\u1ee7a d\u00f2ng \u0111i\u1ec7n<\/td>\nKi\u1ec3m tra F44
                                            \nThay \u0111\u1ed5i F44 sao cho ph\u00f9 h\u1ee3p v\u1edbi y\u00eau c\u1ea7u c\u1ee7a qu\u00e1 tr\u00ecnh, hay s\u00e9t t\u1edbi 999 n\u1ebfu kh\u00f4ng c\u1ea7n gi\u1edbi h\u1ea1n t\u1ed1c \u0111\u1ed9
                                            \nKi\u1ec3m tra \u0111\u1eb7t tuy\u1ebfn V\/f cho \u0111\u00fang v\u1edbi h\u00e0m c\u00e0i \u0111\u1eb7t F04, F05, P01 v\u00e0 P02
                                            \nThay \u0111\u1ed5i \u0111\u1eb7t tuy\u1ebfn V\/f cho ph\u00f9 h\u1ee3p v\u1edbi \u0111\u1ed9ng c\u01a1<\/td>\n<\/tr>\n
                                            4<\/td>\nL\u1ed7i th\u00f4ng s\u1ed1 c\u1ee7a \u0111\u1ed9ng c\u01a1<\/td>\nKi\u1ec3m tra c\u00e0i \u0111\u1eb7t P01, P02, P03, P06, P07, P09, P10 v\u00e0 P12 sao cho ph\u00f9 h\u1ee3p v\u1edbi \u0111\u1ed9ng c\u01a1.
                                            \nSet P02, P03 cho \u0111\u00fang v\u00e0 t\u1ef1 \u0111\u1ed9ng \u0111i\u1ec1u khi\u1ec3n bi\u1ebfn t\u1ea7n.<\/td>\n<\/tr>\n
                                            5<\/td>\nL\u1ed7i k\u1ebft n\u1ed1i c\u1ee7a encoder<\/td>\nKi\u1ec3m tra d\u00e2y.
                                            \n\u0110i l\u1ea1i d\u00e2y t\u1edbi c\u00e1c terminal P0,PA,PB,PZ v\u00e0 CM
                                            \nKi\u1ec3m tra \u0111\u01b0\u1eddng v\u1ec1 c\u1ee7a t\u00edn hi\u1ec7u t\u1eeb encoder th\u1ecfa c\u00e1c \u0111i\u1ec1u ki\u1ec7n: Khi bi\u1ebfn t\u1ea7n ch\u1ea1y v\u1edbi n\u00fat FWD, m\u1ed9t xung nh\u1ecdn..
                                            \nTruy\u1ec1n nh\u1eadn t\u00edn hi\u1ec7u gi\u1eefa termnical PA v\u00e0 PB<\/td>\n<\/tr>\n
                                            6<\/td>\n\u0110\u01b0\u1eddng k\u1ebft n\u1ed1i t\u1edbi \u0111\u1ed9ng c\u01a1 b\u1ecb sai<\/td>\nKi\u1ec3m tra d\u00e2y t\u1edbi \u0111\u1ed9ng c\u01a1
                                            \nK\u1ebft n\u1ed1i terminal U, V v\u00e0 W c\u1ee7a bi\u1ebfn t\u1ea7n t\u01b0\u01a1ng \u1ee9ng v\u1edbi terminal U, V, W c\u1ee7a \u0111\u1ed9ng c\u01a1<\/td>\n<\/tr>\n
                                            7<\/td>\n\u0110\u1ed9 khu\u1ebfch \u0111\u1ea1i c\u1ee7a b\u1ed9 \u0111i\u1ec1u khi\u1ec3n t\u1ed1c \u0111\u1ed9 qu\u00e1 l\u1edbn hay qu\u00e1 nh\u1ecf<\/td>\nC\u1ea5u h\u00ecnh l\u1ea1i L36, L39<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n
                                              \n
                                            1. \n

                                              OE \u2013\u00a0Over torque error<\/h3>\n<\/li>\n<\/ol>\n\n\n\n\n\n\n\n\n\n
                                              <\/td>\n\n

                                              L\u00fd do c\u00f3 th\u1ec3 g\u00e2y ra<\/p>\n<\/td>\n

                                              		\n

                                              C\u00e1ch ki\u1ec3m tra v\u00e0 \u0111\u1ec1 xu\u1ea5t gi\u1ea3i ph\u00e1p<\/p>\n<\/td>\n<\/tr>\n

                                              1<\/td>\nNg\u00f5 ra c\u1ee7a bi\u1ebfn t\u1ea7n b\u1ecb m\u1ea5t<\/td>\nKi\u1ec3m tra ddwuognf k\u1ebft n\u1ed1i c\u1ee7a ng\u00f5 ra bi\u1ebfn t\u1ea7n (U,V,W) v\u1edbi \u0111\u1ed9ng c\u01a1.
                                              \nKi\u1ec3m tra xem b\u1ed9 ph\u1eadn n\u00e0o m\u1ea5t k\u1ebft n\u1ed1i.
                                              \nKi\u1ec3m tra terminal<\/td>\n<\/tr>\n
                                              2<\/td>\nD\u00e2y k\u1ebft n\u1ed1i gi\u1eefa encoder v\u00e0 card option b\u1ecb \u0111\u1ee9t<\/td>\nKi\u1ec3m tra k\u1ebft n\u1ed1i
                                              \nKi\u1ec3m tra terminal<\/td>\n<\/tr>\n
                                              3<\/td>\nT\u1ea3i qu\u00e1 n\u1eb7ng<\/td>\n\u0110o d\u00f2ng c\u1ee7a \u0111\u1ed9ng c\u01a1 v\u00e0 ghi l\u1ea1i. Ki\u1ec3m tra xem c\u00f3 ph\u00f9 h\u1ee3p v\u1edbi thi\u1ebft k\u1ebf hay kh\u00f4ng. N\u1ebfu t\u1ea1i qu\u00e1 n\u1eb7ng th\u00ec thay bi\u1ebfn t\u1ea7n c\u1ea5p cao h\u01a1n.
                                              \nKi\u1ec3m tra xem c\u00f3 s\u1ef1 thay \u0111\u1ed5i d\u00f2ng \u0111\u1ed9 xu\u1ea5t hay kh\u00f4ng, thay bi\u1ebfn t\u1ea7n c\u1ea5p cao h\u01a1n.<\/td>\n<\/tr>\n
                                              4<\/td>\nTh\u1eddi gian t\u0103ng t\u1ed1c v\u00e0 gi\u1ea3m t\u1ed1c qu\u00e1 nhanh<\/td>\nKi\u1ec3m tra xem moment c\u1ee7a \u0111\u1ed9ng c\u01a1 c\u00f3 \u0111\u00e1p \u1ee9ng \u0111\u01b0\u1ee3c trong khi t\u0103ng t\u1ed1c ho\u1eb7c gi\u1ea3m t\u1ed1c hay kh\u00f4ng.
                                              \nT\u00ednh to\u00e1n l\u1ea1i moment qu\u00e1n t\u00ednh c\u1ee7a t\u1ea3i v\u1edbi th\u1eddi gian t\u0103ng v\u00e0 gi\u1ea3m t\u1ed1c.
                                              \nC\u00e0i \u0111\u1eb7t th\u1eddi gian t\u0103ng v\u00e0 gi\u1ea3m t\u1ed1c l\u1edbn h\u01a1n.
                                              \nThay bi\u1ebfn t\u1ea7n c\u1ea5p cao h\u01a1n.<\/td>\n<\/tr>\n
                                              5<\/td>\nSai th\u00f4ng s\u1ed1 c\u00e0i \u0111\u1eb7t \u0111\u1ed9ng c\u01a1<\/td>\nKi\u1ec3m tra th\u00f4ng s\u1ed1 \u0111\u1ed9ng c\u01a1 (h\u00e0m P)
                                              \nS\u1eeda th\u00f4ng s\u1ed1 c\u1ee7a \u0111\u1ed9ng c\u01a1 theo nameplate<\/td>\n<\/tr>\n
                                              6<\/td>\nS\u1ed1 c\u1ef1c c\u1ee7a \u0111\u1ed9ng c\u01a1 b\u1ecb sai<\/td>\nThay \u0111\u1ed5i s\u1ed1 c\u1ef1c<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n
                                                \n
                                              1. \n

                                                PbF \u2013\u00a0Charger circuit fault<\/h3>\n<\/li>\n<\/ol>\n\n\n\n\n
                                                <\/td>\n\n

                                                L\u00fd do c\u00f3 th\u1ec3 g\u00e2y ra<\/p>\n<\/td>\n

                                                		\n

                                                C\u00e1ch ki\u1ec3m tra v\u00e0 \u0111\u1ec1 xu\u1ea5t gi\u1ea3i ph\u00e1p<\/p>\n<\/td>\n<\/tr>\n

                                                1<\/td>\nKh\u00f4ng c\u00f3 ngu\u1ed3n c\u1ea3u kh\u1edfi \u0111\u1ed9ng t\u1eeb, ng\u1eafn m\u1ea1ch \u0111i\u1ec7n tr\u1edf n\u1ea1p.<\/td>\nKi\u1ec3m tra ngu\u1ed3n v\u00e0o b\u1eb1ng c\u00e1c \u0111\u01b0a ngu\u1ed3n 1 pha v\u00e0o 2 ch\u00e2n R0 v\u00e0 T.
                                                \nki\u1ec3m tra d\u00e2y k\u1ebft n\u1ed1i.<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n
                                                \n
                                                \n
                                                <\/div>\n<\/div>\n<\/div>\n","protected":false},"excerpt":{"rendered":"

                                                Ph\u1ea7n 1: OC 1 \u2013 Overcurrent (Qu\u00e1 d\u00f2ng) OV 1 \u2013 Overvoltage (Qu\u00e1 \u00e1p) LU \u2013 Undervoltage (B\u1ea3o v\u1ec7 th\u1ea5p \u00e1p) L in \u2013 Input Phase Loss Overcurrent (L\u1ed7i qu\u00e1 d\u00f2ng) \u2013\u00a0OC 1 L\u00fd do c\u00f3 th\u1ec3 g\u00e2y ra C\u00e1ch ki\u1ec3m tra v\u00e0 \u0111\u1ec1 xu\u1ea5t gi\u1ea3i ph\u00e1p 1 Ng\u00f5 ra b\u1ecb ng\u1eafn m\u1ea1ch -Th\u00e1o terminal […]<\/p>\n","protected":false},"author":2,"featured_media":22696,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[8],"tags":[13667,13668],"class_list":["post-22694","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-tin-t-dng-hoa","tag-bang-ma-loi-bien-tan-fuji","tag-cac-loi-cua-bien-tan-fuji"],"_links":{"self":[{"href":"https:\/\/hunglong.banbientan.com\/index.php?rest_route=\/wp\/v2\/posts\/22694","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/hunglong.banbientan.com\/index.php?rest_route=\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/hunglong.banbientan.com\/index.php?rest_route=\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/hunglong.banbientan.com\/index.php?rest_route=\/wp\/v2\/users\/2"}],"replies":[{"embeddable":true,"href":"https:\/\/hunglong.banbientan.com\/index.php?rest_route=%2Fwp%2Fv2%2Fcomments&post=22694"}],"version-history":[{"count":0,"href":"https:\/\/hunglong.banbientan.com\/index.php?rest_route=\/wp\/v2\/posts\/22694\/revisions"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/hunglong.banbientan.com\/index.php?rest_route=\/"}],"wp:attachment":[{"href":"https:\/\/hunglong.banbientan.com\/index.php?rest_route=%2Fwp%2Fv2%2Fmedia&parent=22694"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/hunglong.banbientan.com\/index.php?rest_route=%2Fwp%2Fv2%2Fcategories&post=22694"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/hunglong.banbientan.com\/index.php?rest_route=%2Fwp%2Fv2%2Ftags&post=22694"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}